Integrated Circuit and System Design Lab
We have EDA tools for design, simulation and verification (functional, timing, physical) for analog, digital, custom, mixed signal and RF IC domains from Cadence, Synopsys and Mentor Graphics.
Backend tools from magma, Cadence, Synopsys for placement, routing, layout and layout verification and export to GDSII format.
System verliog tools from Bluspec and Coware to implement large gate count, IP based and bus intensive chips.
Verilog and VHDL tools from Cadence, Synopsys, Mentor Graphics, Xilinx to write HDL code for digital circuits.
Synthesis tools from Synplicity in addition to tools from earlier vendors.
PCB design tools from Cadence and Mentor Graphics for designing of circuit boards for IC testing and development.
Simulation accelerator tool IMAGE from Powai labs to enable hardware acceleration of HDL code.
FPGA kits and programming software from Xilinx and Altera.
Low power, configurable and extensible processor Tensilica's Xtensa. Its main feature is the user-customizable instruction set. Xtensa processor is useful for SOC designers with everything needed to quickly design small, low power and high-speed dataplane processors that exactly match the required application.
- Created: 20 August 2016
- Last Updated: 20 August 2016