International Conferences/ Symposiums

 

  1. Dhavse, Rasika,Suresh, K.,Mishra, Vivekanand,Patrikar, Rajendra Memory Behaviour and Distributed Capacitive Coupling Model for Low Frequency Inversion Capacitance of a Quantum Dot Flash Memory Gate Stack Modelling Symposium (AMS), 2014 8th Asia DOI: 10.1109/AMS.2014.54 Publication Year: 2014 , Page(s): 241 - 246 IEEE Conference Publication
  2. Dhavse, R. ; Muhammed, F. , Sinha, C. , Mishra, V. , Patrikar, R.M., “ Simulation of Quantum Dot Flash Gate Stack with Lower Tunneling Voltages” Devices, Circuits and Communications (ICDCCom), 2014 International Conference on DOI: 10.1109/ICDCCom.2014.7024743 Publication Year: 2014 , Page(s): 1 - 6 IEEE Conference Publications
  3. Amit M Joshi,Dr. Vivekanand Mishra and Prof. Rajendra M Patrikar, “Low Complexity Hardware Implementation of Quantization and CAVLC for H.264 Encoder”, IEEE International Conference on computational Intelligence and Computing research (ICCIC-2014), 18-20 Dec, 2014, PARK College of Engineering and Technology, Coimbatore-641659, Tamilnadu, India.(presented and to be published ion IEEE Explorer)
  4. Jayu Kalambe and Rajendra Patrikar “Fabrication and characterization of bilayerMicrocantilever based thermal detector” ISSS International Conference on Smart Materials, Structures and Systems July 08-11, 2014, Bangalore, India
  5. A. A. Deshmukh, R. B. Deshmukh and R. M. Patrikar, “An Efficient Implementation of Self Timed Audio Sigma-Delta Modulator, 2013 EAMTA, Buenos Aires, South America, 15-16 August 2013, pp 27-31.
  6. Atul K. Dwivedi, R. B. Deshmukh, R. M. Patrikar, "Modeling and simulation of capacitive sensor for E.Coli bacteria in water", in 16th International Workshop on Physics of Semiconductor Devices, Vandana Singh; Monica Katiyar; B. Mazhari; S. s. Iyer; Utpal Das; Aloke Dutta; Ritu Sodhi; S. Anantharamakrishna, Editors, Proceedings of SPIE Vol. 8549 (SPIE, Bellingham, WA 2012), 854914.
  7. Amol Morankar, Dr. R. M. Patrikar, “Design & Simulation of Metal MEM Parallel Beam Resonator”, International Conference on Nano Science & Technology, at International Advance Research Centre for Powder Metallurgy and New Materials, Hyderabad, India, Jan 20th – 23rd 2012
  8. Jayu P Kalambe, Rajendra M Patrikar, “Microcantilever Based Biosensor with Electrical Read-out Method”, International Conference on Nano Science & Technology, at International Advance Research Centre for Powder Metallurgy and New Materials, Hyderabad, India, Jan 20th – 23rd 2012
  9. Jayu Kalambe, Rajendra Patrikar “Microcantilever Based Biosensor with Electrical Read-out Method”1st International Symposium on Physics & technology of Sensors (ICONSAT-2012) sponsored by IEEE, held at Pune, India March 08-10, 2012.
  10. Gaurav Pendharkar, Raghavendra Deshmukh, Rajendra Patrikar, “Effect of Surface Roughness on the single and multiphase fluid flow through microchannel using Lattice Boltzmann method”, Sixteenth International Workshop on Physics of Semiconductor Devices (IWPSD-2011). December 19-22, Indian Institute of Technology, Kanpur.
  11. Raju Lampande, R.B. Deshmukh, R. M. Patrikar,”Influence of Shape and Size on the Optical Properties of Palladium Nanostructures”, IWPSD 2011, Dec 2011.
  12. Kapil Soni; and Rajendra Patrikar; “Inductive Degenerated Low noise Amplifier for Wireless Application in 0.18um UMC CMOS”, 15th IEEE VLSI Design & Test (VDAT) Symposium, July 2011.
  13. Ashwini Shrirao; Rashmi Gautam; and Rajendra Patrikar; “Simulation of Low Voltage Flash Memory Cell”, 15th IEEE VLSI Design & Test (VDAT) Symposium, July 2011.
  14. Sujeet Kumar; R.B. Deshmukh; and Rajendra Patrikar; “Low Power High Throughput Differential Current Mode Signaling Technique for Global VLSI Interconnect”, 15th IEEE VLSI Design & Test (VDAT) Symposium, July 2011. .
  15. Madhuri Borkar; Rashmi Gautam; and Rajendra Patrikar; “Simulation of 22nm n-Metal Oxide Semiconductor Field Effect Transistor”, 15th IEEE VLSI Design & Test (VDAT) Symposium, July 2011.
  16. Deshmukh, A.A. Deshmukh, R. Patrikar, R.; “ Low Power Asynchronous Sigma-Delta Modulator Using Hysteresis Level Control”, ISVLSI 2011, July 2011, pg 353.
  17. Y. Sadavarte, Mahendra Gaikwad and Rajendra Patrikar "Comparative Study of Switching Techniques for Network-on-Chip Architecture” International Conference on “Communication, Computing & Security-ICCCS 2011” organized by National Institute of Technology (NIT), Rourkela, Odisha, 12-14 Feb. 2011 & published by ACM Digital Library (ISBN-978-1-14503-0464-1).
  18. S.B. Dhok ,R.B. Deshmukh and A.G. Keskar"Fast Fractal Encoding through FFT using modified cross correlation based similarity measure ", , International conference on Advanced Topics in Artificial Intelligence (ATAI) Phuket, Thailand Nov 2010.
  19. Atul Kumar Dwivedi, Gaurav pendharkar, R.B.Deshmukh, R.M. Patrikar, "Detection of E.Coli Cell using capacitance modulation", Comsol conference Bangalore, India,October 29-30, 2010. (awarded 2nd prize by juri's choice)
  20. Praveen Kumar Reddy, Rajendra Patrikar,"A Novel Curvature Compensation Technique for voltage reference circuit", 14th IEEE VLSI Design & Test (VDAT) Symposium, July 2010.
  21. Anita Deshmukh, Ravi Patil, Raghvendra Deshmukh, Rajendra Patrikar,"Asynchronous ADC Using Novel Asynchronous Subranging Scheme",14th IEEE VLSI Design & Test (VDAT) Symposium, July 2010.
  22. Anurag Zope, W Khokle, Raghvendra Deshmukh, Rajendra Patrikar", Constant Bias Current Gain Variation Method for Weak and Strong Inversion MOSFETs," 14th IEEE VLSI Design & Test (VDAT) Symposium, July 2010.
  23. Mahendra Gaikwad, Rajendra Patrikar and Abhay Gandhi “Energy-aware Network-on-Chip architecture using Perfect Difference Network” International Conference on Advances in Computer Engineering-ACE-2010 organized by ACEE & IEEEXplore CPS, Banglore, 21-22 June 2010. (Recipient of First Best Research Paper of the Conference)
  24. Raju Lampande, Nilesh Barange, Rajendra Patrikar, "Nanoparticles Marker for Biological application using surface enhanced Raman Spectroscopy", Nanotech conference & Expo 2010 , Anaheim CA ,USA.
  25. Kalyani Patrikar, Rashmi, "Growth of silicon quantum dot/Nanocrystals on hafnium oxide films", proc. of International conference on NANO Technology materials and composites for frontier applications, Pune,2010.
  26. Sanjay Sahare, Chandrashekhar Kukade, Rashmi, Rajendra Patrikar "Formation of silicon quantum dots using LPCVD on substrate treated with rapid thermal processing", proc. of International conference on NANO Technology materials and composites for frontier applications,2010,pune.
  27. Sneha Cherian Earaly, Rashmi, Rajendra Patrikar,"Effect of strain on silicon nanowire transistor and its potential application as a biosensor", proc. of International conference on NANO Technology materials and composites for frontier applications,2010,pune.
  28. B. Kranthi Kumar, Rahmi, Rajendra Patrikar ,"Simulation of quantum dot floating gate EEPROM cell,. proc. of International conference on NANO Technology materials and composites for frontier applications",2010,pune.
  29. Krishna Reddy, Chandrashekhar Kukade, Rashmi, Rajendra patrikar, "Computer modeling and simulation of hot wire chemical vapor deposition", proc. of International conference on NANO Technology materials and composites for frontier applications,2010,pune.
  30. Rashmi and R. M. Patrikar, "Simulation of Nanostructure Floating Gate Asymmetric Channel EEPROM Cells”, Proceedings of XV International workshop on Physics of semiconductor Devices (IWPSD) December 2009, New Delhi.
  31. Anurag Zope, Waman Khokle, Raghvendra D. Deshmukh, and Rajendra Patrikar “Weak Inversion based Low Power Low Noise Sixth order gm-C Filter at 1V for ECG Application with 180nm Technology” VDAT, July 2009
  32. Raju Lampande, Gaurav Pendharkar and Rajendra Patrikar, "Study of Optical Properties of different nanostructures for biomedical application”, Proceedings of XV International workshop on Physics of semiconductor Devices (IWPSD) July 2009, New Delhi.
  33. Jayu Kalambe, Anju Gupta, Rajesh Pande, R.M. Patrikar, “Modeling and simulation of MEMS cantilever for Bio-sensor application,” International Conference on MEMS, IIT Madras, Jan 3-5, 2009.
  34. Raju Lampande, Chandrashekhar Kukade, Raghvendra D Deshmukh, Rajendra Patrikar “ An Algorithm for High speed, Low power Implementation of ModularMultiplier” VDAT 2009
  35. Pande, Rajesh; Patrikar, Rajendra; ” A CAD tool for RF MEMS devices ”, Design Automation Conference, 2008. ASPDAC 2008. Asia and South Pacific 21-24 March 2008 Page(s):89 - 94 Digital Object Identifier 10.1109/ASPDAC.2008.4484067
  36. Sudhir G. Akojwar and Rajendra. M. Patrikar “Perfect Difference Set – Networks for Wireless Sensor Networks” 4th IEEE International Conference on Communications and Sensor Networks, IIIT Allahabad, INDIA, Dec 27-29, 2008. pp 95-100.
  37. Rajendra. M. Patrikar and Sudhir G. Akojwar “Neural Network Based Classification Techniques for Wireless Sensor Network with Cooperative Routing” 12th WSEAS International Conference on COMMUNICATIONS, Heraklion, Greece, July 23-25, 2008, page(s) 433-438.
  38. Meenakshi Bheevgade, and Rajendra M. Patrikar “Implementation of Watch Dog Timer for Fault Tolerant Computing on Cluster Server” PWASET, 2008,Volume 28 April 2008 ISSN 1307-6884, P265-268.
  39. R.V.Kshirsagar, R.M.Patrikar, Design of a reconfigurable multiprocessor core for higher performance and reliability of embedded systems", IFIP International Conference on Very Large Scale Integration, held in Nice, France, January 2008
  40. Amey Walke, W.S.khokle, Rajendra M Patrikar “Design of Low Power Low Pass Filter for ECG Application with deep Submicron technology” VDAT 2008-06-19
  41. Vinayak Pachkawade, Rajendra Patrikar, “ Selecting an optimunm bias current for an auxiliary amplifier for power optimisation” VDAT 2008
  42. R.M. Badghare, R.B. Deshmukh, R.M. Patrikar “Novel Circuits for Two’s Complement of a Binary Number” IEEE VDAT 2008 (VLSI Design and Test Symposium).
  43. Manik Mujumdar, Meenakshi Bheevgade, Latesh Malik, and Rajendra Patrikar “High Performance Computational Grids- Fault tolerance at System Level” ICETET, 2008, P379-383.
  44. Hassan M Raza and R. M. Patrikar “High throughput design & implementation of multi- FFT/IFFT core in FPGA for hardware acceleration” paper accepted at High performance computing HiPC-2008 SS International conference, Bangalore.
  45. Harode, A.N.; Pinge, M.; Joshi, A.; Patrikar, R.M.; ”Calculation of mobility using Monte Carlo method in a doped semiconducting single wall carbon nanotubes”, Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on 16-20 Dec. 2007 Page(s):943 – 945
  46. Pande, R.S.; Jalgaonkar, A.; Patrikar, R.M.; A 3-D FEM based extractor for MEMS inductor with Monte-Carlo sampling Physics of Semiconductor Devices, 2007. IWPSD 2007. International Workshop on 16-20 Dec. 2007 Page(s):710 – 713;
  47. Rajesh S. Pande, R.M. Patrikar, “Finite element analysis and optimization of RF MEMS devices,” International Conference on Computer Aided Engineering (CAE 2007), Indian Institute of Technology, Madras, Dec. 13-15 2007.
  48. Amit N. Harode and R.M. Patrikar, “Hybrid multiscale simulation of heteroepitaxial growth of ultra thin films,” in the International Conference on Computer Aided Engineering, (CAE-2007) December 13 – 15, 2007, Indian Institute of Technology Madras.
  49. Sudhir G. Akojwar and Rajendra. M. Patrikar “Classification Techniques with Cooperative Routing for Industrial Wireless Sensor Networks”International Joint Conferences on Computer, Information, and Systems Sciences, and Engineering (CISSE 07- Online conference) December 3 - 12, 2007.
  50. Sudhir Akojwar, Rajendra Patrikar “Neural Networks based Real Time Classifier for Wireless Sensor Networks and Framework for VLSI Implementation,” ISIE2007 IEEE International Symposium on Industrial Electronics June 4-7, 2007
  51. Sudhir G. Akojwar, R.M.Patrikar, “Classification techniques for sensor data and clustering architecture for wireless sensor networks”, IAENG International conference on communication systems and applications (ICCSA'07) ,IMECS2007 , pp 1246 – 1255, Hong Kong, 21-23 march, 2007.
  52. Sanjiv K. Mangal, Rahul.M.Badghare,R.B.Deshmukh, and R.M.Patrikar , “FPGA Implementation of Low power parallel multiplier ”, in Proc. of 20 th IEEE Int. VLSI Design conf., jan. 2007.
  53. Shantanu A. Bhalerao, Abhishek V. Chaudhary, Rajendra M. Patrikar,"A CMOS Low Voltage Charge Pump",in 20th Intl. Conf. on VLSI Design,2007
    To be held from Jan. 6-10 2007 at Bangalore
  54. Hassan M Raza and R. M. Patrikar “Hardware/software co-design simulation method for shared bus multiprocessor system” paper accepted at INDICON-2007 (IEEEIndia sponsored) International conference,Bangalore.
  55. Hassan M Raza and R. M. Patrikar “Verification of Multiprocessor system using Hardware/Software Co-simulation” paper accepted at SPIT-IEEE Colloquium 2007 international conference – Mumbai.
  56. Rahul Badghare; Sanjiv Mangal,Raghvendra Deshmukh, Rajendra Patrikar “FPGA Implementation of Low Power ASU Multiplier” VDAT 2007
  57. Saket Sakunia, Shantanu A. Bhalerao, Abhishek V. Chaudhary, Mukund Jyotishi, Mandar Dixit, Raghav Jumde, Rajendra M. Patrikar ” UbiSens: Achieving a low power Wireless Sensor Nodes” Fourth IEEE/IFIP International Conference on Wireless and Optical Communication Networks, 2007
  58. Navaram Kumar Rajendra Patrikar, Kishore Kulat, ”A Double-Pulsed Latch Flip-Flop” VDAT 2007
  59. Akojwar, S.G.; Patrikar, R.M.; “Real Time Classifier For Industrial Wireless Sensor Network Using Neural Networks with Wavelet Preprocessors” Industrial Technology, 2006. ICIT 2006. IEEE International Conference on 15-17 Dec. 2006 Page(s):512 - 517
  60. Sudhir G. Akojwar, R.M.Patrikar, Real Time Classifier For Industrial Wireless Sensor Network Using Neural Networks with Wavelet Preprocessors, IEEE International conference on Industrial Technology, (ICIT 2006), 15-17 Dec 2006, Mumbai, INDIA
  61. Mrunal. A. K, Shirasgaonkar. M, Rajendra Patrikar " Highly Linear and Efficient AlGaAs/GaAs HBT Power Amplifier with Integrated Linearizer”;,. IEEE APCCAS 2006, Dec 4-5, Singapore
  62. Mrunal. A. K, Shirasgaonkar. M, Rajendra Patrikar "Stacked Active Loads For Low Power, High Speed GaAs Digital Circuits";. (IEEE APCCAS 2006, Dec 4-5, Singapore)
  63. Hassan M Raza, R.M.Patrikar, “Can controller implementation on FPGA” PCEA-IFToMM International conference – PICA 2006
  64. Shantanu A. Bhalerao, Abhishek V. Chaudhary, Raghavendra B. Deshmukh, Rajendra M. Patrikar,"Powering Wireless Sensor Nodes using Ambient RF Energy",in IEEE Conf. on Systems, Man, and Cybernetics, 2006 Held on October 8-11, 2006 at Taipei, Taiwan
  65. Shantanu A. Bhalerao, Abhishek V. Chaudhary, Raghavendra B. Deshmukh, Rajendra M. Patrikar,"RF Energy Scavenging for Wireless Sensor Nodes",in 10th IEEE VLSI Design And Test Symposium (VDAT), 2006 Held on August 9 - 12, 2006 at Goa
  66. Mrunal. A. K, Shirasgaonkar. M, Rajendra Patrikar "Power Amplifier Linearization using a Diode";, IEEE MELECON 2006, May 16-19, Benalmádena (Málaga), Spain, pages: 173-176, Digital Object Identifier: 10.1109/MELCON.2006.1653064
  67. Makrand Shirasgaonkar, A.K. Mrunal, Rajendra M. Patrikar “Power Amplifier Linearization Using Diode on Voltage”, The 13th IEEE Mediterranean Electrotechnical Conference - MELECON – Benalmádena (Málaga) , Spain – May 2006.
  68. Rajendra M. Patrikar “Design Planning for Uniform Thermal Distribution.” The 19th International conference on VLSI Design Jan.2006.
  69. Rajendra M. Patrikar Olivier Peyran “Design Planning for Uniform Thermal Distribution.” Design Planning for Uniform Thermal Distribution VLSI Design, 2006. Held jointly with 5th International Conference on Embedded Systems and Design., 19th International Conference on 03-07 Jan. 2006 Page(s):541 – 544
  70. Mrunal. A. K, Shirasgaonkar. M, Rajendra Patrikar "Highly Linear, Highly Efficient Power Amplifier Design, VDAT 2006, India.
  71. Rajesh Pande, R.M.Patrikar “Effect of surface roughness on RF MEMS switch. “at International Conference on MEMS and Semiconductor Nanotechnology (MEMS-NANO’05) December 2005 (I.I.T., Kharagpur).
  72. Amit Harode, Anup Narkhede, R.M.Patrikar ”An Investigation of the Temperature Dependence of the Mobility using Monte Carlo Method in Carbon Nanotubes” International Conference on MEMS and Semiconductor Nanotechnology (MEMS-NANO’05) December 2005 (I.I.T., Kharagpur).
  73. Ganesan S Iyer and Rajendra M. Patrikar, “Effect on Surface Roughness on Physical Design Parameters.”8th VLSI Design & Test Workshops (VDAT), August,2004.

Ganesan S Iyer and Rajendra M. Patrikar, “An Application of Neural Network Learning to Physical Design Optimization in VDSM Technology.” 8th VLSI Design & Test Workshops (VDAT), August,2004.